Silicon Carbide, Sapphire, and Gallium Nitride

Table of Contents

Introduction

Application Requirements

System Specifications

Processing Flow

Results

Introduction

In the production of semiconductor devices, the pursuit of cost reduction is always driven by output and yield. Compared with traditional semiconductor technologies, silicon carbide (SiC), sapphire, and gallium nitride (GaN) are three increasingly popular materials that can significantly reduce costs. Hemei Semiconductor (HSM) has developed a successful method to process silicon carbide, sapphire, and gallium nitride substrates to an "EPI ready" state.

Sapphire is particularly attractive to practitioners in the laser industry due to its uniform dielectric constant and high-quality crystal structure. This has led to the increased application of sapphire substrates in blue laser diodes, and sapphire has also become the foundation for today's radio frequency (RF) switch applications.

Silicon carbide has properties such as high thermal conductivity, high oxidation resistance, chemical inertness, and high mechanical strength. These characteristics make it an ideal material for a variety of applications, including biomedical materials, high-temperature semiconductor devices, synchrotron radiation optical components, and lightweight high-strength structures. In certain short-wavelength (biocompatible), high-temperature, radiation-resistant, and high-power applications, silicon carbide exhibits superior physical and electronic properties compared to silicon and gallium arsenide.

Gallium nitride is currently used in high-power transistors capable of operating at high temperatures. These transistors leverage gallium nitride's ability to generate high-power output in a small volume. Combined with the material's high efficiency in power amplifiers at ultra-high and microwave frequencies, gallium nitride has become an ideal material for future development in a wide range of optoelectronic applications.

Application Requirements

In each case, the goal of polishing sapphire, silicon carbide, and gallium nitride wafers is to reduce the final thickness of the substrate to the desired target value, with a total thickness variation (TTV) better than ±2 μm and a surface roughness improved to less than 2 nanometers (Ra < 2 nm). This is achieved by first bonding the wafer to a quartz glass substrate using Hemei's Wafer Substrate Bonding Unit (WB).

After bonding, the wafer needs to be ground to remove excess material, followed by polishing. The Lapping process is performed using HS, MS and HSM-CMP equipment equipped with Hemei's SJ and ASJ precision polishing fixtures.

During Lapping, the fixture is mounted on a cast iron Lapping plate, and a variety of process parameter options are available to allow users to understand the material removal process.

After Lapping, the wafer must be cleaned and removed from its glass substrate. It is then transferred to a fixture designed for a precision high-speed polishing system with a polishing head. Using either of these two systems, wafers of the three materials (in various quantities) can be polished to a repeatable nanoscale finish.

(Figure: Polishing Machine)
(Figure: Polishing Fixture)

System Specifications

Depending on the number of wafers to be processed, Hemei offers a variety of systems for polishing sapphire, silicon carbide, and gallium nitride. However, each system can include the following components:

Processing Flow

Installation, Fixing, and Lapping

Using the Wafer Substrate Bonding Unit (WB), sapphire, silicon carbide, or gallium nitride wafers are temporarily bonded to a glass support plate. This system ensures that the wafer and the support plate are always highly parallel, regardless of whether a single large wafer or multiple small wafers of different thicknesses are bonded. After successful bonding, the support plate can be mounted on the vacuum chuck surface of the Hemei fixture. The fixture is then flipped, with the processing side facing down, and placed on the cast iron Lapping plate of the HSM-L equipment. Subsequently, the system is set to rotate at a maximum speed of 100 revolutions per minute (rpm), while the Lapping slurry is delivered to the plate surface at a constant flow rate via a metering Lapping fluid peristaltic pump (controlled by the control interface), and the user can independently control the amount of slurry delivered to the plate surface.

Installation, Fixing, and Polishing

After removing the excess material from the substrate through Lapping, the C-ASJ drive head high-speed polishing system is used to polish the wafer surface. This produces a high-quality surface on each wafer.

The HSM-CMP system uses fixing methods such as water suction and vacuum to clamp and fix the wafer, eliminating the need for a glass substrate. Therefore, before setting the wafer on the polishing head of the HSM-CMP system, it needs to be removed from the glass substrate. Each polishing head is customized according to the specific requirements of the customer to ensure optimal results from the polishing process.

Throughout the entire polishing process, the HSM-CMP system provides a high level of controllability, as manual operations can be performed "in-situ". Process parameters such as plate speed, polishing head downward load, and slurry flow rate can all be controlled via a touch screen, allowing users to make immediate and precise adjustments and control.

Results

By using Hemei's polishing system to complete the preparation of silicon carbide, sapphire, or gallium nitride substrates, an ideal surface roughness can be achieved before subsequent processing using traditional CMOS technology. Each polished wafer has a uniform amount of material removed during processing, resulting in a uniformly flat surface.

By adjusting the pressure (load) applied to the substrate during processing, optimal material removal rates (MRR) of 6 μm/h for sapphire and 1-2 μm/h for silicon carbide can be achieved.

The following results for silicon carbide and gallium nitride are obtained from a batch of 12 2-inch diameter wafers processed on the HSM-CMP system; the results for sapphire are obtained from a batch of 84 2-inch diameter wafers processed on the HSM-CMP system.

(Chart Description: A. Silicon Carbide B. Sapphire C. Gallium Nitride)

[Image: A. Silicon Carbide; B. Sapphire; C. Gallium Nitride. Axes: Initial Ra values (nm), Final Ra values (nm), Average MRR (Microns per hour). Data points: A - Initial Ra: 120 nm, Final Ra: 6 nm, MRR: 1-2 μm/h; B - Initial Ra: 100 nm, Final Ra: 1 nm, MRR: 6 μm/h; C - Initial Ra: 80 nm, Final Ra: 3 nm, MRR: 15 μm/h]

Initial Ra Values (After Lapping)

A: 120 nm

B: 100 nm

C: 80 nm

Final Ra Values (After Polishing)

A: 6 nm

B: 1 nm

C: 3 nm

Average MRR (Microns per Hour)

A: 1-2 μm/h

B: 6 μm/h

C: 15 μm/h

A. Silicon Carbide Wafer

Diameter: 2 inches

Material Removal Rate (MRR): 1-2 μm/h

Final Ra Value: < 3 nm

Flatness: ± 2 μm

Bow: < 25 μm

B. Sapphire Wafer

Diameter: 2 inches

Material Removal Rate (MRR): 6 μm/h

Final Ra Value: < 1 nm

Flatness: ± 2 μm

Bow: < 25 μm

C. Gallium Nitride Wafer

Diameter: 2 inches

Material Removal Rate (MRR): 15 μm/h (depending on crystal plane)

Final Ra Value: < 3 nm

Flatness: ± 2 μm

Bow: < 25 μm

(Measured using a Dektak 150 Surface Profiler)