1. Introduction
In the pursuit of higher performance and reliability for semiconductors and cutting-edge applications, silicon nitride (Si₃N₄) has garnered significant attention due to its exceptional combination of properties. It offers high hardness, excellent fracture toughness, good chemical stability, a low coefficient of thermal expansion, and outstanding electrical insulation. These characteristics make it an ideal material for manufacturing key components such as high-performance ceramic bearings, insulating layers in semiconductor processes, thermal management substrates, and optical windows.
Leveraging profound experience in polishing hard and brittle materials like silicon carbide and sapphire, Hemei Corporation has developed a mature polishing process specifically for silicon nitride substrates. This process efficiently and consistently processes silicon nitride wafers to an "epitaxy-ready" grade ultra-smooth surface, meeting the most stringent application requirements.
2. Application Requirements
The polishing objectives for silicon nitride wafers align with those for other advanced ceramic materials: thinning the substrate to the target thickness while strictly controlling the Total Thickness Variation (TTV) to better than ±2 micrometers, and significantly improving the surface roughness (Ra) to less than 2 nanometers.
To achieve these goals, the Hemei process first involves temporarily bonding the silicon nitride wafer to a quartz glass carrier disk using a wafer bonding system. This ensures stability and parallelism during processing. Subsequently, a two-step method comprising precision Lapping and polishing enables full-process control from rapid material removal to fine polishing.
3. System Specifications
Hemei's modular polishing system can flexibly handle silicon nitride wafers of different sizes and batch quantities. The core system includes:
HSM-L / HSM-LP Series Grinding Equipment: Used for the initial precision grinding stage.
HSM-CMP Series Chemical Mechanical Polishing System: Used for the final ultra-precision polishing, achieving nanoscale surface finish.
Key Subsystems:
Wafer Bonding Unit (WB): Ensures high-precision bonding of the wafer to the carrier disk.
SJ/ASJ Series Precision Polishing Fixtures: Provides stable and reliable clamping solutions.
C-ASJ Drive Head High-Speed Polishing System: Enables efficient and uniform material removal.
4. Processing Flow
4.1 Mounting, Fixturing, and Grinding
Bonding: Use the Hemei WB bonding unit to temporarily bond the silicon nitride wafer to a quartz glass support disk. This system can compensate for thickness variations between different wafers, ensuring good initial parallelism.
Fixturing: Mount the bonded substrate onto the vacuum chuck of an SJ or ASJ series polishing fixture.
Grinding: Invert the fixture so the wafer's processing face is downward onto the grinding plate of the HSM-L equipment. The system operates at speeds up to 130 rpm, while a metering pump delivers diamond grinding slurry to the plate surface at a controlled flow rate. This step aims to remove the bulk of the material rapidly and uniformly, while preliminarily controlling thickness variation.
4.2 Mounting, Fixturing, and Polishing
Transfer: After grinding, clean the wafer and remove it from the glass carrier disk.
Precision Polishing:
Option A (High-Precision Preferred): Use the Hemei HSM-CMP system. The wafer is directly fixed onto a customized polishing head via water suction or vacuum, eliminating the need for secondary bonding. This system offers high process controllability; key parameters such as platen speed, downforce, and slurry flow rate can be precisely adjusted in real-time via the touchscreen interface to optimize material removal rate (MRR) and surface quality.
Option B (High-Efficiency Alternative): Load the wafer into a dedicated polishing fixture equipped with a C-ASJ drive head for high-speed polishing.
5. Results
Utilizing the Hemei polishing system for silicon nitride substrates yields an ideal high-quality surface ready for subsequent thin-film deposition or bonding processes. Each polished wafer achieves uniform material removal and极高的表面平整度 (extremely high surface flatness).
By optimizing process parameters (such as applied pressure), the Hemei process can achieve an optimal Material Removal Rate (MRR) for silicon nitride of 1.5 - 3 μm/hour, striking a balance between efficiency and surface quality.
The following data is based on results measured from a batch of ten 2-inch silicon nitride wafers processed on the HSM-CMP system:
| Parameter | After Grinding (Initial) | After Polishing (Final) | Target Specification |
|---|---|---|---|
| Surface Roughness (Ra) | ~110 nm | < 1.5 nm | Ra < 2 nm |
| TTV | - | < ±1.5 μm | TTV < ±2 μm |
| MRR | - | 1.5 - 3 μm/h | - |
| Bow | - | < 20 μm | Bow < 25 μm |
| The above parameter results are for reference only from Hemei Semiconductor (Suzhou) Lab. |
Typical Results for Silicon Nitride Wafers
Diameter: 2 inches (scalable to larger sizes)
Material Removal Rate (MRR): 1.5 - 3 μm/hour
Final Ra Value: < 1.5 nm
Flatness (TTV): < ±1.5 μm
Bow: < 20 μm
The above parameter results are for reference only from Hemei Semiconductor (Suzhou) Lab.
Summary: Hemei's polishing solution provides a production-proven processing path for silicon nitride substrates, capable of consistently and repeatably achieving nanoscale surface finish and micron-level geometric accuracy. This robustly supports the industrialization of silicon nitride in various high-end applications.
